At power-up, the processor boots first and then configures functions in programmable fabric. At its heart is a silicon implementation of a standard ARM Cortex A9 processor, and sharing the chip is a chunk of FPGA fabric. IP for processors and for DSP functionality has long been available, but in 2011, FPGA market leader Xilinx launched the first SoC FPGA, which they call Zynq.
There are huge quantities of IP for a wide range of functions and, over time, the FPGA companies have added hard-wired functions – for communication, for example. FPGAs have been around for a long time, and they have moved from being merely the glue logic on a board to becoming significant devices in their own right, with massive deployments in a wide range of applications, particularly in communications. If you are intending to produce many of these, the alternative might be an SoC/ASIC, which, even if you go down the low-cost route (see Cheap Chips: ASICs for the Rest of Us), is still going to take time and involve considerable NRE investment, and the end result is relatively inflexible. The result is a relatively large board, with the inherent reliability issues and a high BoM cost. You can assemble components on a board – possibly a processor, a DSP, an FPGA for peripherals, and a networking ASIC. You are beginning a new project – let’s say a motor control system.
#Altera dsp builder compatibility with xilinx boards software#
What would be useful is if you share it with your system architect colleagues and your software colleagues, for whom much of this may well be new and useful. Firstly – if you are an existing FPGA user, you may not find much that is new in this piece, but really, it is not aimed at you.